cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 194

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

Registers
0xE0F—IN2H (INPORT2 Status Register [high byte])
InPort2[11]
InPort2[10]
InPort2[9]
InPort2[8]
0xE10—INCL (INPORT2 Control Register [low byte])
InMode[7]
InMode[6]
InMode[5]
InMode[4]
InMode[3]
InMode[2]
InMode[1]
InMode[0]
3-84
InMode[7]
—
7
7
InMode[6]
This bit reflects the current state of the INPORT2[11] input pin.
This bit reflects the current state of the INPORT2[10] input pin.
This bit reflects the current state of the INPORT2[9] input pin.
This bit reflects the current state of the INPORT2[8] input pin.
When set to 0, the INPORT2[7] and INPORT1[7] pins function as input pins. When set to 1,
the INPORT2[7] and INPORT1[7] pins function as TxSync[7] and RxSync[7], respectively.
When set to 0, the INPORT2[6] and INPORT1[6] pins function as input pins. When set to 1,
the INPORT2[6] and INPORT1[7] pins function as TxSync[6] and RxSync[6], respectively.
When set to 0, the INPORT2[5] and INPORT1[5] pins function as input pins. When set to 1,
the INPORT2[5] and INPORT1[7] pins function as TxSync[5] and RxSync[5], respectively.
When set to 0, the INPORT2[4] and INPORT1[4] pins function as input pins. When set to 1,
the INPORT2[4] and INPORT1[4] pins function as TxSync[4] and RxSync[4], respectively.
When set to 0, the INPORT2[3] and INPORT1[3] pins function as input pins. When set to 1,
the INPORT2[3] and INPORT1[3] pins function as TxSync[3] and RxSync[3], respectively.
When set to 0, the INPORT2[2] and INPORT1[2] pins function as input pins. When set to 1,
the INPORT2[2] and INPORT1[2] pins function as TxSync[2] and RxSync[2], respectively.
When set to 0, the INPORT2[1] and INPORT1[1] pins function as input pins. When set to 1,
the INPORT2[1] and INPORT1[1] pins function as TxSync[1] and RxSync[1], respectively.
When set to 0, the INPORT2[0] and INPORT1[0] pins function as input pins. When set to 1,
the INPORT2[0] and INPORT1[0] pins function as TxSync[0] and RxSync[0], respectively.
—
6
6
Value after reset: 00
Direction: Read/Write
Value after reset: 00
Direction: Read/Write
NOTE:
Preliminary Information/Mindspeed Proprietary and Confidential
InMode[5]
—
5
5
Mindspeed Technologies™
When selected, RxSync[i] is output as described in
an output or input, controlled by the bits TxSYOut (bit 3) and TxSYIn (bit 2) in CR05,
Feature 2 Control Register. Additional information on the use of the TxSync[i] signal
can be found in
InMode[4]
—
4
4
Section
InPort2[11]
InMode[3]
2.1.1.
3
3
InPort2[10]
InMode[2]
2
2
Section
InMode[1]
InPort2[9]
2.1.2. TxSync[i] is either
1
1
CX28365/6/4 Data Sheet
InMode[0]
InPort2[8]
0
0
500028C