UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 872

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

870
(7) Slave mode
(8) Transfer clock selection function
SCKEn (input)
SOEn (output)
The slave mode is set when the CEnCTL1.CEnCKS2 to CEnCTL1.CEnCKS0 bits are set to 111, and data is
transferred with the serial clock input to the SCKEn pin (in the slave mode, set the CEnCTL1.CEnMDL2 to
CEnCTL1.CEnMDL0 bits to 000) (n = 0, 1).
Remark
In the master mode (CEnCTL1.CEnCKS2 to CEnCTL1.CEnCKS0 bits = other than 111 in the CEnCTL1
register), the bit transfer rate can be selected by setting the CEnCTL1.CEnCKS2 to CEnCTL1.CEnCKS0,
CEnMDL2 to CEnMDL0 bits (see 18.4 (2) CSIEn control register 1 (CEnCTL1)).
SIEn (input)
Figure 18-9. Slave Mode (CEnCTL1.CEnCKP and CEnCTL1.CEnDAP bits = 00,
n = 0, 1
CEnCTL2.CEnDLS3 to CEnCTL2.CEnDLS0 bits = 1000 (Transfer Data Length: 8 Bits))
CHAPTER 18 CLOCKED SERIAL INTERFACE E WITH FIFO (CSIE)
DO7
DI7
DO6
DI6
User’s Manual U19601EJ2V0UD
DO5
DI5
DO4
DI4
DO3
DI3
DO2
DI2
DO1
DI1
DO0
DI0