UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 262
UPD70F3786GJ-GAE-AX
Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet
1.UPD70F3778GF-GAT-AX.pdf
(1817 pages)
Specifications of UPD70F3786GJ-GAE-AX
Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
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Company:
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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with the count clock, and the counter starts counting. At this time, the output of the TOAAn0 pin is inverted.
Additionally, the set value of the TAAnCCR0 register is transferred to the CCR0 buffer register.
cleared to 0000H, the output of the TOAAn0 pin is inverted, and a compare match interrupt request signal
(INTTAAnCC0) is generated.
260
When the TAAnCE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H in synchronization
When the count value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is
The interval can be calculated by the following expression.
Interval = (Set value of TAAnCCR0 register + 1) × Count clock cycle
Remark
TAAnCTL1
TAAnCTL0
Note This bit can be set to 1 only when the interrupt request signals (INTTAAnCC0 and INTTAAnCC1) are
(a) TAAn control register 0 (TAAnCTL0)
(b) TAAn control register 1 (TAAnCTL1)
masked by the interrupt mask flags (TAAnCCMK0 and TAAnCCMK1) and timer output (TOAAn1) is
performed. However, set the TAAnCCR0 and TAAnCCR1 registers to the same value (see 7.5.1 (2) (d)
Operation of TAAnCCR1 register).
Remark
n = 0 to 5
TAAnCE
0/1
0
n = 0 to 5
Figure 7-9. Register Settings for Interval Timer Mode Operation (1/2)
TAAnEST
0
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
TAAnEEE
0/1
0
Note
User’s Manual U19601EJ2V0UD
0
0
0
0
TAAnMD2 TAAnMD1 TAAnMD0
TAAnCKS2 TAAnCKS1 TAAnCKS0
0/1
0
0/1
0
0/1
0
0, 0, 0:
Interval timer mode
0: Operates on count clock
1: Counts with external
Select count clock
0: Stops counting
1: Enables counting
selected by TAAnCKS0
to TAAnCKS2 bits
event count input signal
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