UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1632

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
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28.3 Operation
28.3.1 Reset operation via RESET pin
1630
Main clock oscillator (f
Subclock oscillator (f
Internal oscillator (f
Peripheral clock (f
Internal system clock (f
CPU clock (f
CPU
Watchdog timer 2
Internal RAM
I/O lines (ports/alternate-function
pins)
On-chip peripheral I/O registers
Other on-chip peripheral functions
When a low level is input to the RESET pin, the system is reset, and each hardware unit is initialized.
When the level of the RESET pin is changed from low to high, the reset status is released.
Note When the power is turned on, the following pin may output an undefined level temporarily, even during reset.
Caution The OCDM register is initialized by the RESET pin input. Therefore, note with caution that, if a
CPU
• P51/INTP8/DDO
high level is input to the P54/INTP11/DRST pin after a reset release before the OCDM.OCDM0 bit
is cleared, the on-chip debug mode is entered. For details, see CHAPTER 4 PORT FUNCTIONS.
)
Item
X
R
to f
)
XT
X
)
X
)
CLK
/1,024)
),
Table 28-1. Hardware Status on RESET Pin Input
Operation stops
Undefined if power-on reset or CPU access and reset input conflict (data is damaged).
Operation stops
Oscillation stops
Oscillation continues
Oscillation stops
Operation stops
Initialized
Operation stops (initialized to 0)
Otherwise value immediately after reset input is retained.
High impedance
Initialized to specified status, OCDM register is set (01H).
CHAPTER 28 RESET FUNCTIONS
User’s Manual U19601EJ2V0UD
During Reset
Note
Oscillation starts
Oscillation starts
Operation starts after securing oscillation
stabilization time
Operation starts after securing oscillation
stabilization time (initialized to fXX/8)
Program execution starts after securing
oscillation stabilization time
Counts up from 0 with internal oscillation
clock as source clock.
Operation can be started after securing
oscillation stabilization time
After Reset

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