UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1254

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
1252
UF0MODC
(33) UF0 mode control register (UF0MODC)
Bit position
This register controls CPUDEC processing.
This register can be read or written in 8-bit units.
By setting each bit of this register, the setting of the UF0MODS register can be changed. The bit of this
register is automatically cleared to 0 only at hardware reset and when the MRST bit of the UF0GRP register
has been set to 1.
Even if the bit of this register has automatically been set to 1 by hardware, the setting by FW takes
precedence.
Be sure to clear bits 7 and 5 to 2 to “0”. If they are set to 1, the operation is not guaranteed.
Caution This register is provided for debugging purposes. Usually, do not set this register except for
6
7
0
verifying the operation or when a special mode is used.
CDCGDST
Bit name
GDST
CDC
6
CHAPTER 22 USB FUNCTION CONTROLLER (USBF)
Set this bit to 1 to switch the GET_DESCRIPTOR Configuration request to CPUDEC
processing. By setting this bit to 1, the CDCGD bit of the UF0MODS register can be
forcibly set to 1.
5
0
1: Forcibly change the GET_DESCRIPTOR Configuration request to CPUDEC
0: Automatically process the GET_DESCRIPTOR Configuration request (default
processing (sets the CDCGD bit of the UF0MODS register to 1).
value).
User’s Manual U19601EJ2V0UD
4
0
3
0
2
0
Function
1
0
0
0
00200074H
Address
After reset
00H

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