UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 842
UPD70F3786GJ-GAE-AX
Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet
1.UPD70F3778GF-GAT-AX.pdf
(1817 pages)
Specifications of UPD70F3786GJ-GAE-AX
Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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17.8 Cautions
840
(1) When the clock supply to UARTCn is stopped (for example, in IDLE1, IDLE2, or STOP mode), the operation
(2) Start up the UARTCn in the following sequence.
(3) Stop the UARTCn in the following sequence.
(4) In transmit mode (UCnCTL0.UCnPWR bit = 1 and UCnCTL0.UCnTXE bit = 1), do not overwrite the same
(5) In continuous transmission, the communication rate from the stop bit to the next start bit is extended 2 base
<1> Set the UCnCTL0.UCnPWR bit to 1.
<2> Set the ports.
<3> Set the UCnCTL0.UCnTXE bit to 1, UCnCTL0.UCnRXE bit to 1.
<1> Set the UCnCTL0.UCnTXE bit to 0, UCnCTL0.UCnRXE bit to 0.
<2> Set the ports and set the UCnCTL0.UCnPWR bit to 0 (it is not a problem if port setting is not changed).
value to the UCnTX register by software because transmission starts by writing to this register. To transmit the
same value continuously, overwrite the same value.
clocks more than usual. However, the reception side initializes the timing by detecting the start bit, so the
reception result is not affected.
Remark
stops with each register retaining the value it had immediately before the clock supply was stopped. The
TXDCn pin output also holds and outputs the value it had immediately before the clock supply was stopped.
However, the operation is not guaranteed after the clock supply is resumed. Therefore, after the clock supply
is resumed, the circuits should be initialized by setting the UCnCTL0.UCnPWR, UCnCTL0.UCnRXEn, and
UCnCTL0.UCnTXEn bits to 000.
n = 0 to 5 (V850ES/JH3-E)
n = 0 to 7 (V850ES/JJ3-E)
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
User’s Manual U19601EJ2V0UD
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