UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1469

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
15 to 0
(21) RXABTCNT: Reception abort counter
Bit
This is a reception abort counter. It counts the number of receive packets that have been discarded because
of the status of the receive packet, the status of the receive FIFO, address filtering by the MAC, and reception
of a control packet.
Access
Address
Default value 0000 0000H. This register is cleared to its default value by all types of resets.
Caution Be sure to set bits 31 to 16 to “0”.
TABCNT15 TABCNT14 TABCNT13 TABCNT12 TABCNT11 TABCNT10 TABCNT9
TABCNT7
TABCNT
[15:0]
R/W
R/W
31
23
15
Name
R
R
0
0
7
This register can be read and written in 32-bit units.
002e 0274H
TABCNT6
Reception abort count
These bits count the number of receive packets that have been discarded because of the status of
the receive packet, the status of the receive FIFO, address filtering by the MAC, and reception of a
control packet.
If the count value overflows, the value of these bits returns to 0 and the FSTATUS.RACOF bit is
set.
These bits are not cleared by resetting the reception circuit (by setting RFRST and RFFLSH).
R/W
R/W
30
22
14
R
R
0
0
6
TABCNT5
CHAPTER 23 ETHERNET CONTROLLER
R/W
R/W
29
21
13
R
R
0
0
5
User’s Manual U19601EJ2V0UD
TABCNT4
R/W
R/W
28
20
12
R
R
0
0
4
TABCNT3
R/W
R/W
27
19
11
R
R
0
0
3
Description
TABCNT2
R/W
R/W
26
18
10
R
R
0
0
2
TABCNT1
R/W
R/W
25
17
R
R
0
0
9
1
TABCNT8
TABCNT0
R/W
R/W
24
16
R
R
0
0
8
0
1467

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