UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1540

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
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1538
(7) External DMA request enable register (EXDRQEN)
Cautions 1. Assigning multiple DMA channels to the UDMARQ1/UDMAAK1 pin is prohibited (setting
The EXDRQEN register sets the DMA request to each DMA channel when connecting the external USB
device by using the UDMARQm/UDMAAKm pin (m = 0, 1).
This register can be read or written in 8-bit units.
Reset sets This register to 00H.
EXDRQEN
2. Assigning multiple DMA channels to the UDMARQ0/UDMAAK0 pin is prohibited (setting
3. Assigning both the UDMARQ1/UDMAAK1 pin and the UDMARQ0/UDMAAK0 pin to the
4. When using a DMA request from an external source by setting the EXDRQEN register, set
the RQ3EX1E, RQ2EX1E, RQ1EX1E, and RQ0EX1E bits to the UDMARQ1/UDMAAK1 pin at
the same time is prohibited).
the RQ3EX0E, RQ2EX0E, RQ1EX0E, and RQ0EX0E bits to the UDMARQ0/UDMAAK0 pin at
the same time is prohibited).
same DMA channel is prohibited (setting the RQ3EX1E and RQ3EX0E, RQ2EX1E and
RQ2EX0E, RQ1EX1E and RQ1EX0E, and RQ0EX1E and RQ0EX0E bits respectively at the
same time is prohibited).
the DTFRn.IFCn5-IFCn0 bit to 000000 (to prohibit a DMA request via an interrupt).
For details, see 24.3 (6) DMA trigger factor registers 0 to 3 (DTFR0 to DTFR3).
After reset: 00H
RQ3EX1E
RQnEX1E
RQnEX0E
0
1
0
1
7
CHAPTER 24 DMA FUNCTION (DMA CONTROLLER)
RQ2EX1E RQ1EX1E RQ0EX1E RQ3EX0E RQ2EX0E RQ1EX0E RQ0EX0E
Does not assign DMA channel n to UDMARQ1/UDMAAK1 pin
Assigns DMA channel n to UDMARQ1/UDMAAK1 pin
Does not assign DMA channel n to UDMARQ0/UDMAAK0 pin
Assigns DMA channel n to UDMARQ0/UDMAAK0 pin
R/W
6
User’s Manual U19601EJ2V0UD
Address: FFFFFF60H
5
Assignment of DMA channel n (n = 0 to 3)
Assignment of DMA channel n (n = 0 to 3)
4
3
2
1
0

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