UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 353
UPD70F3786GJ-GAE-AX
Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet
1.UPD70F3778GF-GAT-AX.pdf
(1817 pages)
Specifications of UPD70F3786GJ-GAE-AX
Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
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(1) 16-bit counter
(2) CCR0 buffer register
(3) CCR1 buffer register
(4) CCR2 buffer register
(5) CCR3 buffer register
(6) Edge detector
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TABnCNT register.
When the TABnCTL0.TABnCE bit = 0, the value of the 16-bit counter is FFFFH. If the TABnCNT register is
read at this time, 0000H is read.
Reset sets the TABnCE bit to 0. Therefore, the 16-bit counter is set to FFFFH.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR0 register is used as a compare register, the value written to the TABnCCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the
CCR0 buffer register, a compare match interrupt request signal (INTTABnCC0) is generated.
The CCR0 buffer register cannot be read or written directly.
The CCR0 buffer register is cleared to 0000H after reset, as the TABnCCR0 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR1 register is used as a compare register, the value written to the TABnCCR1 register is
transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches the value of the
CCR1 buffer register, a compare match interrupt request signal (INTTABnCC1) is generated.
The CCR1 buffer register cannot be read or written directly.
The CCR1 buffer register is cleared to 0000H after reset, as the TABnCCR1 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR2 register is used as a compare register, the value written to the TABnCCR2 register is
transferred to the CCR2 buffer register. When the count value of the 16-bit counter matches the value of the
CCR2 buffer register, a compare match interrupt request signal (INTTABnCC2) is generated.
The CCR2 buffer register cannot be read or written directly.
The CCR2 buffer register is cleared to 0000H after reset, as the TABnCCR2 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR3 register is used as a compare register, the value written to the TABnCCR3 register is
transferred to the CCR3 buffer register. When the count value of the 16-bit counter matches the value of the
CCR3 buffer register, a compare match interrupt request signal (INTTABnCC3) is generated.
The CCR3 buffer register cannot be read or written directly.
The CCR3 buffer register is cleared to 0000H after reset, as the TABnCCR3 register is cleared to 0000H.
This circuit detects the valid edges input to the TIABn0 to TIABn3 pins. No edge, rising edge, falling edge, or
both the rising and falling edges can be selected as the valid edge by using the TABnIOC1 and TABnIOC2
registers. The TIAB03 pin is not provided in the V850ES/JH3-E.
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
User’s Manual U19601EJ2V0UD
351
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