UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 358

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

356
(3) TABn I/O control register 0 (TABnIOC0)
The TABnIOC0 register is an 8-bit register that controls the timer output (TOABn0 to TOABn3 pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
TABnIOC0
(n = 0, 1)
After reset: 00H
Notes 1. The TOAB03 pin is not provided in the V850ES/JH3-E. Set the
Cautions 1. Rewrite the TABnOLm and TABnOEm bits when the
Remark
TABnOL3
TABnOEm
TABnOLm
0
1
0
1
7
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
Note 1
2. The output level of the timer output pin (TOABnm) specified by the
• When TABnOLm bit = 0
TABnOE3
Timer output disabled
• When TABnOLm bit = 0: Low level is output from the TOABnm pin
• When TABnOLm bit = 1: High level is output from the TOABnm pin
TOABnm output pin
Timer output enabled (a square wave is output from the TOABnm pin).
TAB0OL3 and TAB0OE3 bits to 0.
TABnOLm bit is shown below.
m = 0 to 3
R/W
TOABnm pin high level start
TOABnm pin low level start
2. Even if the TABnOLm bit is manipulated when the TABnCE
<6>
TABnCTL0.TABnCE bit = 0. (The same value can be written
when the TABnCE bit = 1.)
performed, clear the TABnCE bit to 0 and then set the bits
again.
and TABnOEm bits are 0, the TOABnm pin output level varies.
16-bit counter
Note 1
TABnCE bit
Address: TAB0IOC0 FFFFF542H, TAB1IOC0 FFFFF562H
User’s Manual U19601EJ2V0UD
TABnOL2 TABnOE2 TABnOL1 TABnOE1 TABnOL0 TABnOE0
TOABnm pin output level setting (m = 0 to 3)
5
TOABnm pin output setting (m = 0 to 3)
<4>
3
• When TABnOLm bit = 1
TOABnm output pin
If rewriting was mistakenly
<2>
16-bit counter
TABnCE bit
Note 2
1
<0>