BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 954

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.3.9
• The CMSPCK input frequency must be one-half or less of the frequency of the internal system clock (f
CMSPCK
CMSD[7:0]
CMSHBK
CMSHSY
CMSVSY
CMOS Sensor I/F
Note: The “Equation” column in the table shows the specifications under the conditions DVCC3LCD = 1.8 to 3.6 V
AC measurement conditions:
AC measurement conditions
• The letter “T” used in the equations in the table represents the period of internal bus frequency (f
• Output level: High = 0.7 × DVCC3
• Input level: High = 0.9 × DVCC3
which is one-half of the CPU clock (f
and DVCC1A = DVCC1B = DVCC1C =1.4 to 1.6 V.
t
CMSPCK input frequency *
CMSPCK input rise time
CMSPCK input fall time
CMSPCK low level pulse width
CMSPCK high level pulse width
CMSD[7:0] input data valid to
CMSPCK rise
CMSPCK rise to
CMSD[7:0] input data hold
CMSHBK, CMSVSY input to
CMSPCK rise
CMSPCK rise to
CMSHBK, CMSVSY hold
CSD
t
CS
Parameter
t
DSD
t
DS
t
CWL
TMPA900CM- 953
TENTATIVE
LCD
t
LCD
CWH
t
Symbol
DHD
t
DH
FCLK
, Low = 0.1 × DVCC3
t
t
f
CWH
CWL
PCK
t
t
t
t
DH
CH
DS
CS
, Low = 0.3 × DVCC3
t
t
r
f
).
t
r
Min
10.0
10.0
2.0
5.0
5.0
5.0
0
Equation
LCD
LCD
t
f
t
t
CH
CHD
Max
35.0
5.0
5.0
Unit
MHz
ns
TMPA900CM
2009-10-14
HCLK
HCLK
),
).

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