BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 921

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

.
3. CLKSCR3 (Oscillation frequency detection control register 3)
[31:2]
[1]
[0]
[Explanation]
Bit
a. <RESEN>
Note: This RESEN bit takes 2 fs cycles in maximums until the configuration is executed after writing into this bit.
b. <CLKSF>
0y0: Disable OFD reset. The output signal OFDOUTn is driven high.
0y1: Enable OFD reset. When an abnormal condition is detected, a reset is generated
Read
Write
This bit can be poling whether or not the configulation is set and after that the other register setting can be
done.
0y0: The frequency of the high-frequency oscillation clock is within the specified
0y1: The frequency of the high-frequency oscillation clock is outside the specified
−
RESEN
CLKSF
0y0: Invalid
0y1: Clear the flag to “0”
Symbol
and OFDOUTn is driven low.
range.
range.
oscillation clock frequency returns to the specified range.
Bit
<CLKSF>=0y1 remains set until it is cleared. Even when the high-frequency
−
R/W
R/W
Type
TMPA900CM - 920
Undefined
0y0
0y0
TENTATIVE
Reset
Value
Read undefined. Write as zero.
OFD reset enable:
0y0: Disable
0y1: Enable
High speed oscillation frequency detection flag:
Read:
0y0: OSC normal
0y1: OSC abnormal
Write:
0y0: Invalid
0y1: Clear the flag to ”0”
Description
Address = (0xF009_0000)+(0x0008)
TMPA900CM
2009-10-14