BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 828

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3. WdogControl (Watchdog control register)
4. WdogIntClr (Clears the watchdog interrupt)
[31:2]
[1]
[0]
[31:0]
[Description]
[Description]
a. <RESEN>
b. <INTEN>
a. <WDTINTCLR>
Bit
Bit
0y1: Enables the WDT counter and the WDT interrupt. When this bit is set to 1, the
Writing any value to this register clears the WDT interrupt and loads the value set in the
WdogLoad register into the WDT counter.
Controls the WDT reset output. Time until releasing reset is after PCLK 5 clocks.
RESEN
INTEN
WDTINTCLR
value set in the WdogLoad register is loaded into the WDT counter and the counter
starts decrementing.
Symbol
Symbol
Bit
Bit
R/W
R/W
WO
Type
TENTATIVE
Type
TMPA900CM- 827
Undefined
0y0
0y0
Undefined
Reset
Reset
Value
Value
Read as undefined. Write as zero.
WDT reset output enable
0y0: Disable
0y1: Enable
WDT counter and interrupt enable
0y0: Disable
0y1: Enable
WDT interrupt clear
(Writing any value clears the interrupt.)
Address = (0xF001_0000) + (0x0008)
Address = (0xF001_0000) + (0x000C)
Description
Description
TMPA900CM
2009-10-14

Related parts for BMSKTOPASA900(DCE)