BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 123

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16. DMACC0Configuration (DMAC Channel0 Configuration Register)
[Description]
[31:19]
[18]
[17]
[16]
[15]
[14]
[13:11]
[10]
[9:6]
[5]
[4:1]
[0]
a. < FlowCntrl>
Bit
Note: Please refer to Table 3.8.2 DMA request number chart.
Note: When you selected Memory-to-Memory, hardware start triggered by DMA is not supported. Transfer is started
This bit sets the transfer mode.
0y000: Memory to Memory
0y001: Memory to Peripheral
0y010: Peripheral to Memory
0y011: Peripheral to Peripheral
0y100 to 0y111: Reserved
by writing <E>= 1.
−
Halt
Active
Lock
ITC
IE
FlowCntrl
−
DestPeripheral
−
SrcPeripheral
E
Symbol
Bit
Type
−
R/W
RO
R/W
R/W
−
R/W
−
R/W
R/W
R/W
R/W
TENTATIVE
TMPA900CM- 122
Undefined
0y0
0y0
0y0
0y0
0y0
0y000
Undefined
0y000
Undefined
0y000
0y0
Reset
Value
0y000
0y001
0y010
0y011
Read as undefined. Write as zero.
0y0: DMA requests accepted
0y1: DMA requests ignored
Read:
Write:
0y0: Disable lock transfers
0y1: Enable lock transfers
Terminal count interrupt enable register
0y0: Disable interrupts
0y1: Enable interrupts
Error interrupt enable register
0y0: Disable interrupts
0y1: Enable interrupts
0y100-0y111: Reserved
Read as undefined. Write as zero.
Transfer destination peripheral (Note1)
0y000-0y1111
Read as undefined. Write as zero.
Transfer source peripheral (Note1)
0y000-0y1111
Channel enable
0y0: Disable
0y1: Enable
FlowCntrl
set value
Address = (0xF410_0000) + 0x0110
0y0: No data in the FIFO
0y1: The FIFO has data
Invalid
Memory to Memory
Memory to Peripheral
Peripheral to Memory
Peripheral to Peripheral
Description
Transfer Mode
TMPA900CM
2009-10-14