BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 364
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 364 of 959
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Receive 8-bit data
Receive 7-bit data
Receive 6-bit data
Receive 5-bit data
Bit Number
3.13 UART
Transmit FIFO
Receive FIFO
Transmit/Receive
data format
FIFO ON/OFF
Interrupt
baud rate generator
DMA
IrDA 1.0 Function
Control pins
Hardware flow
control
This LSI contains three UART channels. The feature of each channel is shown below.
(1) UART transmit/receive data format
(2) Receive FIFO data format
START
0
1
1
1
1
(LSB
1
1
1
1
1
8-bit width / 16 location deep
12-bit width /16location deep
DATA bits : 5,6,7,8bits can be selected
PARITY: use / no use
STOP bit:1bit / 2bits
ON (FIFO mode)/
OFF (characters mode)
(1) Combined interrupt factors are output to interrupt controller.
(2) The permission of each interrupt factor is programmable.
Generates a common transmit and receive internal clock from the UART internal reference clock
input.
Supports baud rates of up to 6.15Mbps at f
support
(1) Max data rate:
115.2kbps(half-duplex)
(2) support low power mode
U0RXD
U0TXD
U0CTSn
U0CTSn (Clear To Send)
U0DCDn (Data Carrier Detect)
U0DSRn (Data Set Ready)
U0RIn (Ring Indicator)
U0RTSn(Request To Send)
U0DTRn (Data Terminal Ready)
2
1
1
1
1
Receive data
3
1
1
1
1
RTS support
CTS support
Channel 0
(LSB
4
1
1
1
1
5
1
1
1
0
TENTATIVE
TMPA900CM- 363
MSB)
6
1
1
0
0
Transmit/receive data format
DATA
7
1
0
0
0
Not support
Not support
U1RXD
U1TXD
U1CTSn
error flag
Framing
PCLK
CTS support
Channel 1
MSB)
= 100MHz.
Parity error
flag
PARITY
support
N/A
U2RXD
U2TXD
N/A
Break error
flag
Channel 2
TMPA900CM
STOP
2009-10-14
error flag
Overrun
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