BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 730
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[31:24]
[23:18]
[17:6]
[5:3]
[2:0]
[Description]
a. <OFSETX[7:0]>
b. <DYS1[11:0]>
c.
Bit
7. LDADVSRC1 (LCDDA Delta Value (Read Step) address Register of Source 1)
LCDDA target image
<DXS1[2:0]>
Set the offset value for the horizontal pixel sampling steps in the scaler circuit. By setting
a value of 0x01 to 0xFF, the set pixel point is sampled first.
Set the Step for vertical increment addresses (during line feed) for reading data from the
original picture (Source picture 1) processed on the LCDDA.
Set the Step for horizontal increment addresses for reading data from the original picture
(Source picture 1) processed on the LCDDA. For 16-bpp (64-K color) data, set 0y010
because the step used is 2-byte step. For 32-bpp (16-M color) data, set 0y100.
Picture image
OFSETX[7:0]
−
DYS1[11:0]
−
DXS1[2:0]
Symbol
Bit
R/W
−
R/W
−
R/W
Type
Increment step in the Y direction
TENTATIVE
TMPA900CM- 729
0x0000
Undefined
0x000
Undefined
0y000
Reset
Value
Increment step in the X direction
DYS1
DXS1
Offset value for horizontal sampling point during scaler use
Read undefined. Write as zero.
Read Step address until the next line of SRC1 data
Read undefined. Write as zero.
Horizontal Read Step address of SRC1 data
Description
Address = (0xF205_0000) + (0x0014)
TMPA900CM
2009-10-14
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