BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 895
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Read/Write
(HCD)
Read/Write
(HC)
Read/Write
(HCD)
Read/Write
(HC)
bit Symbol
Reset state
bit Symbol
Reset state
[31]
[30:14]
[13:0]
Bit
15. HcFmRemaining Register
the current Frame.
The HcFmRemaining register is a 14-bit down counter showing the bit time remaining in
Mnemonic
FRT
-
FR
FRT
R/W
31
15
Reserved
R
0
30
14
FrameRemaining
Toggle
Reserved
FrameRemaining
29
13
0
Field name
28
12
0
TENTATIVE
27
11
TMPA900CM- 894
0
26
10
0
This bit is loaded from the FrameIntervalToggle field of HcFmInterval
whenever FrameRemaining reaches 0. This bit is used by HCD for the
synchronization between FmInterval and FmRemaining.
This counter is decremented at each bit time. When it reaches zero, it
is reset by loading the FrameInterval value specified in HcFmInterval
at the next bit time boundary. When entering the UsbOperational state,
the HC re-loads the content with the FrameInterval of HcFmInterval
and uses the updated value from the next SOF.
25
9
0
24
8
0
Reserved
23
7
0
R/W
FR
R
22
6
0
Address = (0xF450_0000) + (0x0038)
Function
21
5
0
20
4
0
19
3
0
18
2
0
TMPA900CM
2009-10-14
17
1
0
16
0
0
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