BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 216

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

[31:3]
[2:0]
[Description]
a. <memc_cmd>
Bit
2.
transition from Pause to Config is effected by a Config command. Register settings must be
made during the Config state.
allowed. When a read or write is executed, the SDRAM will change from IDLE to ACTIVE.
state at this time varies depending on the immediately preceding command executed on the
SDRAM. If a Read or Write has been executed, the SDRAM will be shifted to ACTIVE. If a
AutoRefresh has been executed, the SDRAM will be shifted to IDLE
Settings of this register can change the DMC state machine. If a previously issued
command for changing the states is being executed, a new command is issued after the
previous command is completed.
The following diagram shows DMC state transitions for Low-power.
When the DMC exits the Reset state, it automatically enters the Config state. The state
When the DMC state is shifted to Ready, reads from and writes to the SDRAM are
When the DMC state is Ready, a Pause command shifts the DMC to Pause. The SDRAM
dmc_memc_cmd_3 (DMC Memory Controller Command Register)
−
memc_cmd
Symbol
Bit
WO
−
Reset
Type
POR
config
DMC State Transitions
TENTATIVE
TMPA900CM- 215
Undefined
−
Reset
Value
Configure
Go
Read as undefined. Write as zero.
Change the memory controller status:
0y000 = Go
0y001 = Sleep
0y010 = Wakeup
0y011 = Pause
0y100 = Configure
Pause
Sleep
Pause
Ready
Low
power
Wakeup
Go
Description
Address = (0xF430_0000) + (0x0004)
(Note).
TMPA900CM
2009-10-14