BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 378
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 378 of 959
- Download datasheet (5Mb)
3. UART2DR (UART2 Data Register)
[31:12]
[11]
[10]
[9]
[8]
[7:0]
[Description]
Bit
a. <OE>
b. <BE>
c.
d. <FE>
This bit is set to 1 if a break condition was detected, indicating that the receive data input
(defined as start, data parity, and stop bits) was held Low for a period longer than a
full-word transmission time.
When this bit is set to 1, it indicates that the parity of the received data does not match
the parity defined by bits 2 and 7 of the UARTxLCR_H register.
When this bit is set to 1, it indicates that the received data did not have a valid stop bit (a
valid stop bit is 1).
<PE>
This bit is set to 1 if data is received and the receive FIFO is already full. In this case,
the received data is not stored in the FIFO and is discarded.
The bit is cleared to 0 once an empty space is made in the FIFO and a new data can be
written to it.
−
OE
BE
PE
FE
DATA
Symbol
Bit
−
RO
RO
RO
RO
R/W
Type
TENTATIVE
TMPA900CM- 377
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Reset
Value
Read as undefined. Write as zero.
Overrun error
Read:
Write:
Break error
Read:
Write:
Parity error
Read:
Write:
Framing error
Read:
Write:
Read: Receive data
Write: Transmit data
Address = (0xF200_4000) + (0x0000)
0y0: There is an empty space in the
0y1: Overrun error flag
Invalid
0y0: No error detected
0y1: Error detected
Invalid
0y0: No error detected
0y1: Error detected
Invalid
0y0: No error detected
0y1: Error detected
Invalid
FIFO.
Description
TMPA900CM
2009-10-14
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