BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 359

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TENTATIVE
TMPA900CM
10. Timer0CmpIntClr1 Register
Address = (0xF004_0000) + (0x00C0)
Bit
Reset
Bit
Type
Description
Value
Symbol
[31:0]
TIM0CMINTCLR
WO
Undefined
Timer 0 compare interrupt clear
[Description]
a. <TIMxCMINTCLR>
This register is used to clear timer compare interrupts.
Writing any value in this register causes the corresponding interrupt to be cleared.
(The bus widths of 8, 16 and 32 bits are supported.)
TimerxCmpIntClr1 (Timer x Compare Interrupt Clear register) (x = 0 to 5)
The structure and description of these registers are same as Timer0CmpIntClr.
Please refer to the description of Timer0 CmpIntClr.
For the name and address of these registers, please refer to Table 3.12.2.
TMPA900CM- 358
2009-10-14

Related parts for BMSKTOPASA900(DCE)