BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 644

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WS cycle × 2 process
I2SRSLVON = 0x0
FIFO 1 set
Receive circuit State machine
[31:1]
[0]
[Description]
a. <I2SRx_SLAVE>
Bit
4.
PRE_SBY
When this bit is set (0 → 1), the internal status (I2SRST<I2SRxSTATUS>) changes as
follows:
In the ACT state, data is captured into the FIFO.
When this bit is cleared (1 → 0), the internal status (I2SRST<I2SRxSTATUS>) changes
as follows:
In the SBY state, no data is captured into the FIFO even when input data is present.
I2SRSLVON (Rx I
−
I2SRx_SLAVE
Bit Symbol
SBY (standby) → PRE_ACT → ACT
ACT → PRE_SBY → SBY
State that can write to
FIFO of Transmission
circuit
2
S Slave Control Register)
R/W
−
Type
TENTATIVE
SBY
ACT
TMPA900CM- 643
Undefined
0y0
Reset
Value
Observe I2SRSLVON = 0x1
WS edge
PRE_ACT
Read as undefined. Write as zero.
Write the FIFO for receiver 0y0: OFF
0y1: ON (FIFO write enabled)
WS cycle × 2 process
Address = (0xF204_0000) + (0x0024)
Description
TMPA900CM
2009-10-14