BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 255
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 255 of 959
- Download datasheet (5Mb)
3.10.4
Features of a DMC (Dynamic Memroy Controller):
Features of an SMC (Static Memory Controller):
a. Supports 16-bit DDR SDRAM(only supports LVCMOS type memory I/O power)
b. Supports 1 channel Chip Select signal
c.
a. Supports asynchronous, 32-bit/16-bit SRAM and NOR Flash (only separate buses are
b. Supports 2 channels Chip Select signals
c.
SMC (Static Memory Controller) that controls NOR Flash and SRAM.
Overview of MPMC1
Supports adjusting function in each clock for SDRAM each timing.
supported, and multiplex buses are not supported)
Cycle timings and memory data bus widths can be programmed for each Chip Select
signal
MPMC1 contains both a DMC (Dynamic Memory Controller) that controls SDRAM and
TENTATIVE
TMPA900CM- 254
TMPA900CM
2009-10-14
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