BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 46

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

• Notes
1) The JTAG circuit can be released from the reset state by either of the following two methods:
processor.
(3) BYPASS instruction
(4) CLAMP instruction
(5) HIGHZ instruction
This section describes the cautions of the JTAG boundary-scan operations specific to the
register provides the shortest serial path that bypasses the IC (between JTDI and JTDO)
when the test does not require control or monitoring of the IC. The BYPASS instruction
does not cause interference in the normal operation of the on-chip system logic. Figure
3.2.10 shows the data flow through the bypass register when the BYPASS instruction is
selected.
HIGHZ instruction is executed, it places the 3-state output pins in the high-impedance
state.
・ Assert TRSTn, initialize the JTAG circuit, and then deassert TRSTn.
・ Supply the TCK signal for 5 or more clock pulses to TCK while pulling the TMS pin
according to the PRELOAD instruction, and execute Bypass operation.
The CLAMP instruction outputs the value that boundary scan register is programmed
The CLAMP instruction selects the bypass register between TDI and TDO.
The HIGHZ instruction disables the output of the internal logical circuits. When the
The HIGHZ instruction also selects the bypass register between TDI and TDO.
This instruction targets the bypass register between JTDI and JTDO. The bypass
High.
Figure 3.2.10 Test Data Flow when the BYPASS Instruction is Selected
TDI
TENTATIVE
TMPA900CM- 45
Bypass register
1 bit
TDO
TMPA900CM
2009-10-14