BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 447
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 447 of 959
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I2CINT0 interrupt request
SCL (line)
Internal SDA output
(Master A)
Internal SDA output
(Master B)
SDA line
SDA line
SCL line
3.14.6.6 Generation of Start and Stop Conditions
Start condition
and I2C0CR2<PIN> causes a start condition, the slave address written in the data buffer
register and direction bit to be sent out on the bus. I2C0CR1<ACK> must be set to 1 before
a start condition is generated.
and 0 to I2C0CR2<BB> initiates a sequence for sending out a stop condition on the bus.
busy) when a start condition is detected on the bus, and is cleared to 0 (bus free) when a
stop condition is detected.
after the SCL line is released.
When I2C0SR<BB> = 0, writing 1 to I2C0CR2<MST>, I2C0CR2<TRX>, I2C0CR2<BB>
When I2C0SR<BB> = 1, writing 1 to I2C0CR2<MST>, I2C0CR2<TRX>, I2C0CR2<PIN>
At this time, if the SCL line is pulled low by another device, a stop condition is generated
The bus status can be checked by reading I2C0SR<BB>. I2C0SR<BB> is set to 1 (bus
Figure 3.14.15 Start condition and slave address generation
A6
1
Figure 3.14.16 Stop condition generation
A5
2
SDA line
SCL line
A4
Slave address and direction bit
3
TENTATIVE
TMPA900CM- 446
A3
4
a
Stop condition
A2
b
5
Arbitration lost
Internal SDA output = “1”
A1
6
A0
7
R/W
8
ACK signal
9
TMPA900CM
2009-10-14
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