BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 292

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AHB
Domain
APB slave
SMC I/F
I/F
(2) SMC (Static Memroy Controller)
(a) Arbiter
(b) Memory manager
Figure 3.10.34 is a SMC block diagram.
Manager
Memory
manager, and after access arbitration, it passes the highest priority command to
the memory I/F.
The arbiter receives access commands from the SMC I/F and the memory
Data is read from the memory I/F to the SMC I/F.
Updates timing registers and controls commands issued to memory.
Command
format
Figure 3.10.34 SMC Block Diagram
TENTATIVE
TMPA900CM- 291
Memory I/F
PAD I/F
SRAM memory I/F
Memory
Domain
EBI I/F
TMPA900CM
2009-10-14