BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 306
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 306 of 959
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3.11 NAND-Flash Controller (NDFC)
3.11.1
Note 1: Error correction needs software processing.
Note 2: The WPn (Write Protect) pin of the NAND Flash is not supported. When this function is needed, prepare it on
the NAND-Flash memory. The NDFC also has an ECC calculation function for error
correction. It supports the Hamming Code ECC calculation method for the NAND-Flash
memory of SLC (Single Level Cell) type that is capable of correction (Note1) a single-bit
error for every 256 bytes and the Reed-Solomon ECC calculation method for the
NAND-Flash memory of MLC (Multi-Level Cell) type that is capable of correction (Note 1)
four error addresses for every 512 bytes.
Overview
The NAND-Flash Controller (NDFC) is provided with dedicated pins for connecting with
The NDFC has the following features:
a. Controls the NAND-Flash memory interface through registers.
b. Supports 8-bit NAND-Flash memory devices (Does not support 16-bit devices).
c. Supports page sizes of 512 bytes and 2048 bytes.
d. Includes an ECC generation circuit using Hamming codes (for SLC type).
e. Includes
f. Provides an Autoload function for high-speed data transfer by using two 32bit × 4word
an external circuit.
coding/encoding techniques (for MLC type).
FIFOs together with a DMA controller.
a
4-address
TENTATIVE
TMPA900CM- 305
(4-byte)
error
detection
circuit
using
Reed-Solomon
TMPA900CM
2009-10-14
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