BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 288

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

[31:10]
[9:2]
[1]
[0]
QoS setting register list
[Description]
Bit
dmc_id_0_cfg_5
dmc_id_1_cfg_5
dmc_id_2_cfg_5
dmc_id_3_cfg_5
dmc_id_4_cfg_5
dmc_id_5_cfg_5
a. <qos_max>
b. <qos_min>
c.
20. dmc_id_<0-5>_cfg_5 (DMC id_<0-5>_cfg Registers)
Register
QoS maximum value setting:
0x00 to 0xFF
<qos_enable>
Enable QoS:
0y0 = Disable
0y1 = Enable
Minimum QoS selction:
0y0 = QoS max mode
0y1 = QoS min mode,
−
qos_max
qos_min
qos_enable
QoS minimum have priority over QoS maximum
Symbol
Bit
(0xF431_0000) + (0x0100)
(0xF431_0000) + (0x0104)
(0xF431_0000) + (0x0108)
(0xF431_0000) + (0x010C)
(0xF431_0000) + (0x0110)
(0xF431_0000) + (0x0114)
−
R/W
R/W
R/W
Type
Address
TENTATIVE
TMPA900CM- 287
Undefined
0x00
0y0
0y0
Reset
Value
Read as undefined. Write as zero.
maximum QoS:
0x00 ∼ 0xFF
minimum QoS selection:
0y0 = QoS max mode
0y1 = QoS min mode
QoS setting:
0y0 = Disable
0y1 = Enable
AHB0 : CPU Data
AHB1 : CPU Inst
AHB2 : LCDC
AHB3 : multilayer bus matrix2
AHB4 : DMA1
AHB5 : DMA2
(LCDDA, USB)
Correspond to AHB
Description
Address = (0xF431_0000) + (0x010C)
Address = (0xF431_0000) + (0x0100)
Address = (0xF431_0000) + (0x0104)
Address = (0xF431_0000) + (0x0108)
Address = (0xF431_0000) + (0x0110)
Address = (0xF431_0000) + (0x0114)
TMPA900CM
2009-10-14