HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 930

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 26
Table 26.2 I/O Clock Frequency and Clock Division Ratio
Note: Any setting other than above is handled as a clock division ratio of 1/1 (initial value).
26.3.2
LDMTR sets the control signals output from this LCDC and the polarity of the data signals,
according to the polarity of the signals for the LCD module connected to the LCDC.
Rev. 3.00 Jan. 18, 2008 Page 868 of 1458
REJ09B0033-0300
DCDR[5:0]
000001
000010
000011
000100
000110
001000
001100
010000
011000
100000
Bit
15
14
LCDC Module Type Register (LDMTR)
Bit Name
FLMPOL
CL1POL
LCD Controller (LCDC)
Clock Division
Ratio
1/1
1/2
1/3
1/4
1/6
1/8
1/12
1/16
1/24
1/32
Initial Value
0
0
50.000
50.000
25.000
16.667
12.500
8.333
6.250
4.167
3.125
2.083
1.563
R/W
R/W
R/W
Description
FLM (Vertical Sync Signal) Polarity Select
Selects the polarity of the LCD_FLM (vertical sync
signal, first line marker) for the LCD module.
0: LCD_FLM pulse is high active
1: LCD_FLM pulse is low active
CL1 (Horizontal Sync Signal) Polarity Select
Selects the polarity of the LCD_CL1 (horizontal sync
signal) for the LCD module.
0: LCD_CL1 pulse is high active
1: LCD_CL1 pulse is low active
I/O Clock Frequency (MHz)
60.000
60.000
30.000
20.000
15.000
10.000
7.500
5.000
3.750
2.500
1.875
66.000
66.000
33.000
22.000
16.500
11.000
8.250
5.500
4.125
2.750
2.063