HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1182

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 33 User Break Controller (UBC)
33.2.9
BRCR sets the following conditions:
1. Channels A and B are used in two independent channel conditions or under the sequential
2. A break is set before or after instruction execution.
3. Specify whether to include the number of execution times on channel B in comparison
4. Determine whether to include data bus on channel B in comparison conditions.
5. Enable PC trace.
6. Enable ASID check.
BRCR is a 32-bit readable/writable register that has break conditions match flags and bits for
setting a variety of break conditions.
Rev. 3.00 Jan. 18, 2008 Page 1120 of 1458
REJ09B0033-0300
Bit
3
2
1
0
condition.
conditions.
Break Control Register (BRCR)
Bit Name
RWB1
RWB0
SZB1
SZB0
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Read/Write Select B
Select the read cycle or write cycle as the bus cycle of
the channel B break condition.
00: Condition comparison is not performed
01: The break condition is the read cycle
10: The break condition is the write cycle
11: The break condition is the read cycle or write cycle
Operand Size Select B
Select the operand size of the bus cycle for the
channel B break condition.
00: The break condition does not include operand size
01: The break condition is byte access
10: The break condition is word access
11: The break condition is longword access