HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 809

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

22.3.9
TDFP is the write only port for transmit FIFO. Transmit FIFO has 128 stages (maximum), and can
generate interrupt of the data empty as well as of the threshold size specified by FFSZ (ACTR1).
Directly after the reset and when TE (ACTR1) bit is 0, the pointer of FIFO is set to the first
address and data becomes empty. The interrupt will occur when the TE bit (ACTR1) is written to
1 at that state. In normal case, TE bit should be changed after writing data into transmit FIFO.
22.3.10 Receive Data FIFO Port (RDFP)
RDFP is the read only register for receive FIFO. Receive FIFO has 128 stages (maximum), and
can generate interrupt of the data full as well as of the threshold size specified by FFSZ (ACTR1).
Directly after the reset and when RE bit (ACTR1) is 0, the pointer of FIFO is fixed at the first
address and data from RDFP becomes undetermined.
Bit
15 to 0
Bit
15 to 0
Transmit Data FIFO Port (TDFP)
Bit Name
TDFP15 to
TDFP0
Bit Name
RDFP15 to
RDFP0
Initial Value
All 0
Initial Value
Undefined
R/W
W
R/W
R
Description
Write only port for transmit FIFO.
Description
Read only register for receive FIFO.
Section 22
Rev. 3.00 Jan. 18, 2008 Page 747 of 1458
Analog Front End Interface (AFEIF)
REJ09B0033-0300