HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 472

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10
Direct Memory Access Controller (DMAC)
10.3
Register Descriptions
The DMAC has the following registers. Refer to section 37, List of Registers, for more details on
the addresses and states of these registers in each operating mode. The SAR for channel 0 is
expressed such as SAR_0.
(1) Channel 0
• DMA source address register_0 (SAR_0)
• DMA destination address register_0 (DAR_0)
• DMA transfer count register_0 (DMATCR_0)
• DMA channel control register_0 (CHCR_0)
(2) Channel 1
• DMA source address register_1 (SAR_1)
• DMA destination address register_1 (DAR_1)
• DMA transfer count register_1 (DMATCR_1)
• DMA channel control register _1 (CHCR_1)
(3) Channel 2
• DMA source address register_2 (SAR_2)
• DMA destination address register_2 (DAR_2)
• DMA transfer count register_2 (DMATCR_2)
• DMA channel control register_2 (CHCR_2)
(4) Channel 3
• DMA source address register_3 (SAR_3)
• DMA destination address register_3 (DAR_3)
• DMA transfer count register_3 (DMATCR_3)
• DMA channel control register_3 (CHCR_3)
(5) Channel 4
• DMA source address register_4 (SAR_4)
• DMA destination address register_4 (DAR_4)
• DMA transfer count register_4 (DMATCR_4)
• DMA channel control register_4 (CHCR_4)
Rev. 3.00 Jan. 18, 2008 Page 410 of 1458
REJ09B0033-0300