HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1121

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

(1)
The CMD0, CMD1, CMD2, and CMD4 are broadcast commands. The sequence assigning relative
addresses to individual MMCs consists of these commands and the CMD3 command. In this
sequence, the CMD output format is open drain, and the command response is wired-OR. In this
case, the transfer clock frequency should be set sufficiently slow.
• All MMCs are initialized to the idle state by the CMD0.
• The operation condition register (OCR) of all MMCs is read via wired-OR, and MMCs that
• The card identification (CID) of all MMCs in the ready state is read via wired-OR by the
• A relative address (RCA) is given to the MMC in the acknowledge state by the CMD3.
• CMD2 and CMD3 are repeated, assigning RCAs to all MMCs in the ready state, entering each
Note: When the R2 response (17-byte command response) is required, the CTSEL0 bit should be
(2)
The CMD7, CMD9, CMD10, CMD13, CMD15, CMD39, and CMD55 are relative address
commands that address the MMC by RCA. The relative address commands are used to read MMC
administration information and original information, and to change the specific card status.
The CMD7 sets one addressed MMC to the transfer state, and other MMCs to the standby state.
Only the MMC in the transfer state can execute a flash-memory operation command other than the
broadcast and relative address commands.
cannot operate are deactivated by the CMD1.
The deactivated MMCs enter the ready state.
CMD2.
The individual MMC compares its CID and data on the MMC_CMD, and if different, aborts
CID output. A single MMC in which the CID can be entirely output enters the acknowledge
state.
The MMC to which the RCA is given enters the standby state.
into the standby state.
Operation of Broadcast Commands
Operation of Relative Address Commands
set to 1 since a timeout is generated during response reception if the CTSEL0 bit is set to
0.
Section 31
Rev. 3.00 Jan. 18, 2008 Page 1059 of 1458
MultiMediaCard Interface (MMCIF)
REJ09B0033-0300