HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1060

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 30
Rev. 3.00 Jan. 18, 2008 Page 998 of 1458
REJ09B0033-0300
Bit
3
Bit Name
PER
SIM Card Module (SIM)
Initial
Value
0
R/W
R/W
Description
Parity Error
Indicates that a parity error has occurred during reception,
resulting in abnormal termination.
0: Indicates that reception is in progress, or that reception
[Clearing conditions]
1: Indicates that a parity error occurred during reception*
[Setting condition]
When the sum of 1 bit in the received data and parity bit
does not match the even or odd parity specified by the O/E
bit in the serial mode register (SCSMR).
Notes:
was completed normally*
On reset
When 0 is written to the PER bit
1. When the RE bit in SCSCR is cleared to 0, the
2. In T = 0 mode, the data received when a parity
PER flag is unaffected, and the previous state
is retained.
error occurs is not transferred to SCRDR, and
the RDRF flag is not set.
On the other hand, in T = 1 mode, the data
received when a parity error occurs is
transferred to SCRDR, and the RDRF flag is
set.
When a parity error occurs, the PER flag should
be cleared to 0 before the sampling timing for
the next parity bit.
1
2

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