HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 732

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 20
20.4.6
The logic levels at the SCL and SDA pins are routed through noise cancellers before being latched
internally. Figure 20.16 shows a block diagram of the noise canceller circuit.
The noise canceller consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the peripheral clock, but is not passed forward to the next circuit unless
the outputs of both latches agree. If they do not agree, the previous value is held.
20.4.7
Flowcharts in respective modes that use the I
Rev. 3.00 Jan. 18, 2008 Page 670 of 1458
REJ09B0033-0300
SCL or SDA
input signal
Sampling
clock
Noise Canceller
Example of Use
I
2
C Bus Interface (IIC)
Figure 20.13
Peripheral clock
Sampling clock
D
period
Latch
C
Q
Block Diagram of Noise Conceller
D
2
C bus interface are shown in figures 20.17 to 20.20.
Latch
C
Q
March detector
SCL or SDA
Internal
signal