HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 607
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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15.5
Note that the kinds of operation and contention described below can occur during TPU operation.
(1)
The input clock pulse width must be at least 2 states in the case of single-edge detection, and at
least 3 states in the case of both-edge detection. The TPU will not operate properly with a
narrower pulse width.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 2 states, and the pulse width must be at least 3 states. Figure 15.19 shows the input clock
conditions in phase counting mode.
Figure 15.19
Input Clock Restrictions
TPU_TCLKA
(TPU_TCLKC)
TPU_TCLKB
(TPU_TCLKD)
Usage Notes
Notes: Phase difference and overlap
Pulse width
Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
Overlap
Pulse width
Phase
differ-
ence
Overlap
: 2 states or more
: 3 states or more
Phase
differ-
ence
Pulse width
Rev. 3.00 Jan. 18, 2008 Page 545 of 1458
Pulse width
Section 15
16-Bit Timer Pulse Unit (TPU)
Pulse width
REJ09B0033-0300
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