HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 573

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
This LSI has an on-chip 16-bit timer pulse unit (TPU) that comprises four 16-bit timer channels.
15.1
• Maximum 4-pulse output
• Selection of four counter input clocks for channels 0 and 1, and of six counter input clocks for
• The following operations can be set for each channel:
• Buffer operation settable for each channel
• Phase counting mode settable independently for each of channels 2, and 3
• An interrupt request for each channel
Table 15.1 lists the functions of the TPU.
 A total of 16 timer general registers (TGRA to TGRD × 4 ch.) are provided (four each for
 TGRB, TGRC, and TGRD for each channel can also be used as timer counter clearing
channels 2 and 3.
 Waveform output at compare match: Selection of 0, 1, or toggle output
 Counter clear operation: Counter clearing possible by compare match
 PWM mode: Any PWM output duty can be set
 Automatic rewriting of output compare register possible
 Two-phase encoder pulse up/down-count possible
 For channels 0 and 1, compare match interrupts and overflow interrupts can be requested
 For channels 2, and 3, compare match interrupts, overflow interrupts, and underflow
channels). TGRA can be set as an output compare register.
registers. TGRC and TGRD can also be used as buffer registers.
Maximum of 4-phase PWM output possible
independently
interrupts can be requested independently
Features
Section 15
16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Jan. 18, 2008 Page 511 of 1458
Section 15
16-Bit Timer Pulse Unit (TPU)
REJ09B0033-0300

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