HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 124
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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Section 2
Note:
Rev. 3.00 Jan. 18, 2008 Page 62 of 1458
REJ09B0033-0300
Instruction Format
d type
15
d12 type
15
nd8 type
15
i type
15
ni type
15
xxxx xxxx dddd dddd
xxxx dddd dddd dddd
xxxx nnnn dddd dddd
xxxx xxxx i i i i
xxxx nnnn i i i i
*
CPU
In multiply-and-accumulate instructions, nnnn is the source register.
i i i i
i i i i
0
0
0
0
0
Source Operand
dddddddd: GBR
indirect with
displacement
R0 (register direct) dddddddd: GBR
dddddddd:
PC-relative with
displacement
dddddddd:
PC-relative
dddddddddddd:
PC-relative
dddddddd: PC-
relative with
displacement
iiiiiiii: immediate
iiiiiiii: immediate
iiiiiiii: immediate
iiiiiiii: immediate
Destination
Operand
R0 (register direct) MOV.L @(disp,GBR),R0
indirect with
displacement
R0 (register direct) MOVA @(disp,PC),R0
nnnn: register
direct
Indexed GBR
indirect
R0 (register direct) AND
nnnn: register
direct
Sample Instruction
MOV.L R0,@(disp,GBR)
BF
BRA
MOV.L @(disp,PC),Rn
AND.B #imm,@(R0,GBR)
TRAPA #imm
ADD
label
label
(label=disp+PC)
#imm,R0
#imm,Rn
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