HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 760

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 21
Rev. 3.00 Jan. 18, 2008 Page 698 of 1458
REJ09B0033-0300
Bit
1
0
Bit Name
RFUDF
RFOVF
Serial I/O with FIFO (SIOF)
Initial
Value
0
0
R/W
R/W
R/W
Description
Receive FIFO Underflow
0: No receive FIFO underflow
1: Receive FIFO underflow
A receive FIFO underflow means that reading of SIRDR
has occurred when the receive FIFO is empty.
When a receive FIFO underflow occurs, the value of data
read from SIRDR is not guaranteed.
•
•
•
Receive FIFO Overflow
0: No receive FIFO overflow
1: Receive FIFO overflow
A receive FIFO overflow means that writing has occurred
when the receive FIFO is full.
When a receive FIFO overflow occurs, the SIOF indicates
overflow, and receive data is lost.
•
•
•
This bit is valid when the RXE bit in SICTR is 1.
When 1 is written to this bit, the contents are cleared.
Writing 0 to this bit is invalid.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
This bit is valid when the RXE bit in SICTR is 1.
When 1 is written to this bit, the contents are cleared.
Writing 0 to this bit is invalid.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.