HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 374
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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Section 9
Rev. 3.00 Jan. 18, 2008 Page 312 of 1458
REJ09B0033-0300
Bit
17
16
15 to 11
10
9
8
7
Bus State Controller (BSC)
Bit Name
BW1
BW0
W3
W2
W1
W0
Initial
Value
0
0
All 0
1
0
1
0
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
Description
Number of Burst Wait Cycles
Specify the number of wait cycles to be inserted between
the second or later access cycles in burst access.
00: 0 cycles
01: 1 cycle
10: 2 cycles
11: 3 cycles
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Access Wait Cycles
Specify the number of wait cycles to be inserted in the first
access cycle.
0000: 0 cycles
0001: 1 cycle
0010: 2 cycles
0011: 3 cycles
0100: 4 cycles
0101: 5 cycles
0110: 6 cycles
0111: 8 cycles
1000: 10 cycles
1001: 12 cycles
1010: 14 cycles
1011: 18 cycles
1100: 24 cycles
1101: Reserved (setting prohibited)
1110: Reserved (setting prohibited)
1111: Reserved (setting prohibited)
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