HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 753

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

21.3.5
SITCR is a 32-bit readable/writable register that specifies transmit control data of the SIOF.
SITCR can be specified only when the FL bit in SIMDR is specified as 1xxx (x: Don't care.).
SITCR is initialized in module stop mode.
Bit
31 to 16
15 to 0
Transmit Control Data Register (SITCR)
Bit Name
SITC0
15 to 0
SITC1
15 to 0
Initial
Value
All 0
All 0
R/W
R/W
R/W
Description
Control Channel 0 Transmit Data
Specify data to be output from the SIOFTxD pin as
control channel 0 transmit data. The position of the
control channel 0 data in the transmit or receive frame
is specified by the CD0A bit in SICDAR.
•
Control Channel 1 Transmit Data
Specify data to be output from the SIOFTxD pin as
control channel 1 transmit data. The position of the
control channel 1 data in the transmit or receive frame
is specified by the CD1A bit in SICDAR.
•
These bits are valid only when the CD0E bit in
SICDAR is set to 1.
These bits are valid only when the CD1E bit in
SICDAR is set to 1.
Rev. 3.00 Jan. 18, 2008 Page 691 of 1458
Section 21
Serial I/O with FIFO (SIOF)
REJ09B0033-0300