HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 690

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 18
Rev. 3.00 Jan. 18, 2008 Page 628 of 1458
REJ09B0033-0300
Serial Communication Interface with FIFO (SCIF)
Set transmit trigger number in TTRG1
and TTRG0 in SCFCR, write transmit
(leaving TE and RE bits cleared to 0)
Clear TE and RE bits in SCSCR to 0
Set CKE1 and CKE0 bits in SCSCR
Clear TFRST and RFRST bits to 0
setting number, and clear TDFE
Figure 18.13
data exceeding transmit trigger
flag to 0 after reading 1 from it
Set TFRST and RFRST bits in
Set C/A bit in SCSMR to 1
Set CKS1 and CKS0 bits
1-bit interval elapsed?
Set value in SCBRR
(Simultaneous Transmission and Reception)
Initialization
SCFCR to 1
End
Yes
Sample SCIF Initialization Flowchart (3)
Wait
No
1
2
3
4
5
6
7
1. Be sure to set the TFRST bit in
2. Set the clock selection in SCSCR.
3. Set the clock source selection in
4. Write a value corresponding to the
5. Clear the TFRST and RFRST bits in
6. Set the transmit trigger number, write
7. Wait one bit interval.
SCFCR to 1, to reset the FIFOs.
Be sure to clear bits RIE, TIE, TE,
and RE to 0.
SCSMR.
bit rate into SCBRR.
SCFCR to 0.
transmit data exceeding the transmit
trigger setting number, and clear the
TDFE flag to 0 after reading it.

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