HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 415
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
(1524 pages)
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Table 9.14 Relationship between A2/3BSZ[1:0], A2/3ROW[1:0], A2/3COL[1:0], and
Notes: 1. L/H is a bit used in the command specification; it is fixed at low or high according to the
A2/3
BSZ
[1:0]
11 (32 bits)
Output Pin of
This LSI
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
2. Bank address specification
access mode.
512-Mbit product (4 Mwords x 32 bits x 4 banks, column 9 bits product): 1
256-Mbit product (4 Mwords x 16 bits x 4 banks, column 9 bits product): 2
Address Multiplex Output (3)
A2/3
ROW
[1:0]
10 (13 bits)
Row Address
Output
A26
A25*
A24*
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
2
2
Setting
Example of connected memory
A2/3
COL
[1:0]
01 (9 bits)
Column Address
Output
A17
A25*
A24*
A14
A13
L/H*
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
2
Synchronous
DRAM Pin
A14 (BA1)
A13 (BA0)
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Rev. 3.00 Jan. 18, 2008 Page 353 of 1458
Section 9
Bus State Controller (BSC)
Function
Unused
Specifies bank
Address
Specifies
address/precharge
Address
Unused
REJ09B0033-0300
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