HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 389

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit
8
7 to 5
4
3
2
1
0
Bit Name
BACTV

A3ROW1
A3ROW0

A3COL1
A3COL0
Initial
Value
0
All 0
0
0
0
0
0
R/W
R/W
R
R/W
R/W
R
R/W
R/W
Bank Active Mode
Description
Specifies to access whether in auto-precharge mode (using
READA and WRITA commands) or in bank active mode
(using READ and WRIT commands).
0: Auto-precharge mode (using READA and WRITA
1: Bank active mode (using READ and WRIT commands)
Note: Bank active mode can be used only in area 3. In this
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Bits of Row Address for Area 3
Specify the number of bits of the row address for area 3.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
Reserved
This bit is always read as 0. The write value should always
be 0.
Number of Bits of Column Address for Area 3
Specify the number of bits of the column address for area 3.
00: 8 bits
01: 9 bits
10: 10 bits
11: Reserved (setting prohibited)
commands)
case, the bus width can be selected as 16 or 32 bits.
When both areas 2 and 3 are set to SDRAM, specify
auto-precharge mode.
Rev. 3.00 Jan. 18, 2008 Page 327 of 1458
Section 9
Bus State Controller (BSC)
REJ09B0033-0300