HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 367

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

• CS5AWCR
Bit
5 to 2
1
0
Bit
31 to 19
18
17
16
15 to 13
Bit Name

HW1
HW0
Bit Name

WW2
WW1
WW0

Initial
Value
All 0
0
0
Initial
Value
All 0
0
0
0
All 0
R/W
R
R/W
R/W
R/W
R
R/W
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Delay Cycles from RD, WEn (BEn) negation to
Address, CSn negation
Specify the number of delay cycles from RD and WEn
(BEn) negation to address and CSn negation.
00: 0.5 cycle
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Write Access Wait Cycles
Specify the number of cycles that are necessary for write
access.
000: The same cycles as WR3 to WR0 setting (read or
write access wait)
001: 0 cycles
010: 1 cycle
011: 2 cycles
100: 3 cycles
101: 4 cycles
110: 5 cycles
111: 6 cycles
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 3.00 Jan. 18, 2008 Page 305 of 1458
Section 9
Bus State Controller (BSC)
REJ09B0033-0300