HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 512

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 10
(4)
Rev. 3.00 Jan. 18, 2008 Page 450 of 1458
REJ09B0033-0300
Figure 10.19
Figure 10.20
(rising edge)
(active-high)
(rising edge)
(active-high)
Bus cycle
(DACK is Divided into Four due to Idle Cycle Insertion between Access Cycles and So
Bus cycle
(DACK is Not Divided By Idle Cycle Insertion between Access Cycles and So DREQ
DREQ
DREQ Pin Detection Timing Charts
DACK
CKIO
DREQ
DACK
CKIO
Direct Memory Access Controller (DMAC)
First acceptance
CPU
First acceptance
CPU
Timing of DREQ Input Detection by Edge Detection in Cycle Stealing Mode
Timing of DREQ Input Detection by Edge Detection in Cycle Stealing Mode
Dead zone
Dead zone
DREQ Sampling is Accepted One Extra Time)
Acceptance
started
Sampling is Accepted Normally)
Acceptance started
Second acceptance
Second acceptance
Dead zone
Dead zone
DMAC write or read
DMAC write or read
Acceptance started
Third acceptance (possible)
Dead zone
Acceptance
started
Third
acceptance
Dead zone

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