HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 860
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
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Section 24
24.4
24.4.1
USB Host Controller expects that data is compiled from lower address to upper address regardless
endian setting of the CPU. Below figure shows data read operation, which is done by USB Host
Controller.
The correspondence between data in memory and data read by USB Host Controller must be
equal. When USB Host Controller reads data from external memory, USB Host Controller reads
data by long word read operation every time regardless of endian. USB Host Controller uses data
in byte from lower address in long word which it reads regardless the endian mode. Even endian
mode is set as big or little, set the data from down addresses.
Below program flow is the example of failure.
• In program, set transfer address A to register R0 at big endian
• In program, set transfer start address A to USB Host Controller, and set 1byte as transfer size.
This example shows above operation transfers expected data #H'12.
Data is filled from the lower bits of the memory in writing so that the data is read/written in bi-
direction consistently regardless of the endian type. That is, the data is always aligned with the
little endian specification.
Rev. 3.00 Jan. 18, 2008 Page 798 of 1458
REJ09B0033-0300
In program, "MOV.B #H'12,@R0"
Data Storage Format which Required by USB Host Controller
Storage Format of the Transferred Data
DATA.L
DATA.L
DATA.L
USB Host Controller (USBH)
Program
H'11223344
H'55667788
H'00000099
+3
12
Memory
+2
00
+1
00
+0
00
+11
+3
11
+7
55
00
Memory (Area 3)
+10
+2
22
+6
66
00
LW read H'12000000
Actually transferred data
+1
+5
+9
33
77
00
Data expected to be transferred
+0
+4
44
88
99
8
LW read H'11223344
LW read H'55667788
LW read H'00000099
USB host
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