HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 774

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 21
(2)
The SIOFTxD transmit timing and SIOFRxD receive timing relative to the SIOFSCK can be set as
the sampling timing in the following two ways. The transmit/receive timing is set using the REDG
bit in SIMDR.
• Falling-edge sampling
• Rising-edge sampling
Figure 21.4 shows the transmit/receive timing.
Rev. 3.00 Jan. 18, 2008 Page 712 of 1458
REJ09B0033-0300
SIOFSCK
SIOFSYNC
SIOFTxD
SIOFRxD
(a) Falling-edge sampling
Transmit/Receive Timing
Serial I/O with FIFO (SIOF)
Figure 21.4
Receive timing
Transmit timing
SIOF Transmit/Receive Timing
SIOFSCK
SIOFRxD
SIOFSYNC
SIOFTxD
(a) Rising-edge sampling
Receive timing
Transmit timing

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