HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 390

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9
9.4.5
RTCSR specifies various items about refresh for SDRAM.
When RTCSR is written, the upper 16 bits of the write data must be H'A55A to cancel write
protection.
Rev. 3.00 Jan. 18, 2008 Page 328 of 1458
REJ09B0033-0300
Bit
31 to 8 
7
6
5
4
3
Bit Name
CMF
CMIE
CKS2
CKS1
CKS0
Refresh Timer Control/Status Register (RTCSR)
Bus State Controller (BSC)
Initial
Value
All 0
0
0
0
0
0
R/W
R/W
R/W
R
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Compare Match Flag
Indicates that a compare match occurs between the refresh
timer counter (RTCNT) and refresh time constant register
(RTCOR). This bit is set or cleared in the following
conditions.
0: Clearing condition: When 0 is written in CMF after reading
1: Setting condition: When the condition RTCNT = RTCOR is
Compare Match Interrupt Enable
Enables or disables a CMF interrupt request when the CMF
bit of RTCSR is set to 1.
0: Disables the CMF interrupt request
1: Enables the CMF interrupt request
Clock Select
Select the clock input to count-up the refresh timer counter
(RTCNT).
000: Stop the counting-up
001: Bφ/4
010: Bφ/16
011: Bφ/64
100: Bφ/256
101: Bφ/1024
110: Bφ/2048
111: Bφ/4096
out RTCSR during CMF = 1.
satisfied.