HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1424

no-image

HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 38
38.4.13 SIOF Module Signal Timing
Table 38.15 SIOF Module Signal Timing
Conditions: V
Note:
Rev. 3.00 Jan. 18, 2008 Page 1362 of 1458
REJ09B0033-0300
Item
SIOF_MCLK clock input cycle time
SIOF_MCLK input high level width
SIOF_MCLK input low level width
SIOF_SCK clock cycle time
SIOF_SCK output high level width
SIOF_SCK output low level width
SIOF_SYNC output delay time
SIOF_SCK input high level width
SIOF_SCK input low level width
SIOF_SYNC input setup time
SIOF_SYNC input hold time
SIOF_TXD output delay time
SIOF_RXD input setup time
SIOF_RXD input hold time
t
Pcyc
is a cycle time of a peripheral clock (Pφ).
Electrical Characteristics
V
CC
CC
Q = 2.7 to 3.6 V, V
= 1.4 to 1.6 V, AV
SIOFn_MCLK
Figure 38.53
CC
CC
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Q1 = 2.7 to 3.6 V or 1.65 to 1.95 V,
MCYC
MWH
MWL
SICYC
SWHO
SWLO
FSD
SWHI
SWLI
FSS
FSH
STDD
SRDS
SRDH
= 3.0 to 3.6 V, Ta = −20 to 75°C
SIOF_MCLK Input Timing
t
MWH
Min.
t
0.4 × t
0.4 × t
t
0.4 × t
0.4 × t
0.4 × t
0.4 × t
20
20
20
20
Pcyc
Pcyc
*
t
*
MCYC
1
1
MCYC
MCYC
SICYC
SICYC
SICYC
SICYC
t
MWL
Max.
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure
38.53
38.53
38.53
38.54 to 38.58
38.54 to 38.57
38.54 to 38.57
38.54 to 38.57
38.58
38.58
38.58
38.58
38.54 to 38.58
38.54 to 38.58
38.54 to 38.58

Related parts for HD6417320