HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 299

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
(1)
If an exception is accepted in the repeat control period while the repeat counter (RC[11:0]) in the
SR register is two or greater, the program counter to be saved may not indicate the value to be
returned correctly. To execute the repeat control after returning from an exception processing, the
return address must indicate an instruction prior to a repeat detection instruction. Accordingly, if
an exception is accepted in repeat control period, an exception other than re-execution type
exception by a repeat detection instruction cannot return to the repeat control correctly.
Table 7.3
Note: The following labels are used here.
Instruction Where an
Exception Occurs
RptDtct
RptDtct1
RptDtct2
RptDtct3
SPC Saved by an Exception in Repeat Control Period
RptDtct:
RptDtct1: Instruction address immediately after the repeat detect instruction
RptDtct2: Second instruction address from the repeat detect instruction
RptDtct3: Third instruction address from the repeat detect instruction
RS:
If a re-execution type exception is accepted at an instruction in the hatched areas above, a
return address to be saved in the SPC is incorrect. If SR.RC[11:0] is 1 or 0, a correct return
address is saved in the SPC.
SPC Value When a Re-Execution Type Exception Occurs in Repeat Control
(SR.RC[11:0]≥2)
Repeat detection instruction address
Repeat start instruction address
1
RptDtct1
RptDtct
Number of Instructions in a Repeat Loop
2
RptDtct
RptDtct1
RptDtct1
Rev. 3.00 Jan. 18, 2008 Page 237 of 1458
3
RptDtct
RptDtct1
RptDtct1
RptDtct1
Section 7 Exception Handling
4 or Greater
RptDtct
RptDtct1
RS-4
RS-2
REJ09B0033-0300

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